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MC100EP14 3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver
Description
The MC100EP14 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The EP14 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure that the tight skew specification is realized, both sides of any differential output need to be terminated even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) without affecting skew. The common enable (EN) is synchronous, outputs are enabled/ disabled in the LOW state. This avoids a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input. The MC100EP14, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the EP14 to be used for high performance clock distribution in 5.0 V systems. Designers can take advantage of the EP14's performance to distribute low skew clocks across the backplane or the board.
Features
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TSSOP-20 DT SUFFIX CASE 948E
MARKING DIAGRAM*
20 100 EP14 ALYWG G 1 A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
* * * * * * * * *
400 ps Typical Propagation Delay 100 ps Device-to-Device Skew 25 ps Within Device Skew Maximum Frequency > 2 GHz Typical The 100 Series Contains Temperature Compensation PECL and HSTL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V NECL Mode: VCC = 0 V with VEE = -3.0 V to -5.5 V Open Input Default State These are Pb-Free Devices
(Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
November, 2006 - Rev. 5
1
Publication Order Number: MC100EP14/D
MC100EP14
VCC 20 EN 19 VCC 18 CLK1 17 CLK1 16 VBB 15 CLK0 14 CLK0 13 CLK_SEL 12 VEE 11
1
0
D Q
1 Q0
2 Q0
3 Q1
4 Q1
5 Q2
6 Q2
7 Q3
8 Q3
9 Q4
10 Q4
WARNING: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
Figure 1. TSSOP-20 (Top View) and Logic Diagram Table 1. PIN DESCRIPTION
Pin CLK0*, CLK0** CLK1*, CLK1** Q0:4, Q0:4 CLK_SEL* EN* VBB VCC VEE Function ECL/PECL/HSTL CLK Input ECL/PECL/HSTL CLK Input ECL/PECL Outputs ECL/PECL Active Clock Select Input ECL Sync Enable Reference Voltage Output Positive Supply Negative Supply
Table 2. FUNCTION TABLE
CLK0 L H X X X CLK1 X X L H X CLK_SEL L L H H X EN L L L L H Q L H L H L*
* On next negative transition of CLK0 or CLK1
* Pins will default low when left open. ** Pins will default to VCC/2 when left open.
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MC100EP14
Table 3. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Pb Pkg Level 1 Value 75 kW 37.5 kW > 4 kV > 200 V > 2 kV Pb-Free Pkg Level 1
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) TSSOP-8 Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
UL 94 V-0 @ 0.125 in 357 Devices
Table 4. MAXIMUM RATINGS
Symbol VCC VEE VI Iout IBB TA Tstg qJA qJC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder 0 lfpm 500 lfpm Standard Board <2 to 3 sec @ 248C TSSOP-20 TSSOP-20 TSSOP-20 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 6 -6 6 -6 50 100 0.5 -40 to +85 -65 to +150 140 100 23 to 41 265 Unit V V V V mA mA mA C C C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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MC100EP14
Table 5. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 4) Input HIGH Current Input LOW Current D D 0.5 -150 Min 45 2155 1355 2075 1355 1775 1.2 1875 Typ 55 2280 1480 Max 65 2405 1605 2420 1675 1975 3.3 Min 48 2155 1355 2075 1355 1775 1.2 1875 25C Typ 58 2280 1480 Max 68 2405 1605 2420 1675 1975 3.3 Min 52 2155 1355 2075 1355 1775 1.2 1875 85C Typ 62 2280 1480 Max 72 2405 1605 2420 1675 1975 3.3 Unit mA mV mV mV mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 3. All loading with 50 W to VCC - 2.0 V. 4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 6. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 6) Output LOW Voltage (Note 6) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 7) Input HIGH Current Input LOW Current D D 0.5 -150 Min 45 3855 3055 3775 3055 3475 1.2 3575 Typ 55 3980 3180 Max 65 4105 3305 4120 3375 3675 5.0 Min 48 3855 3055 3775 3055 3475 1.2 3575 25C Typ 58 3980 3180 Max 68 4105 3305 4120 3375 3675 5.0 Min 52 3855 3055 3775 3055 3475 1.2 3575 85C Typ 62 3980 3180 Max 72 4105 3305 4120 3375 3675 5.0 Unit mA mV mV mV mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 6. All loading with 50 W to VCC - 2.0 V. 7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC100EP14
Table 7. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = -5.5 V to -3.0 V (Note 8)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 9) Output LOW Voltage (Note 9) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Reference Voltage Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 10) Input HIGH Current Input LOW Current CLK CLK 0.5 -150 Min 45 -1145 -1945 -1225 -1945 -1525 -1425 Typ 55 -1020 -1820 Max 65 -895 -1695 -880 -1625 -1325 0.0 Min 48 -1145 -1945 -1225 -1945 -1525 -1425 25C Typ 58 -1020 -1820 Max 68 -895 -1695 -880 -1625 -1325 0.0 Min 52 -1145 -1945 -1225 -1945 -1525 -1425 85C Typ 62 -1020 -1820 Max 72 -895 -1695 -880 -1625 -1325 0.0 Unit mA mV mV mV mV mV V
VEE+1.2
VEE+1.2
VEE+1.2
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Input and output parameters vary 1:1 with VCC. 9. All loading with 50 W to VCC - 2.0 V. 10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 8. AC CHARACTERISTICS VCC = 0 V; VEE = -3.0 V to -5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 11)
-40C Symbol VOPP tPLH tPHL tskew Characteristic Output Voltage Amplitude @ 2 GHz (Figure 2) Propagation Delay to Output Differential Within-Device Skew Device-to-Device Skew (Note 12) Setup Time to CLK EN to CLK Hold Time EN to CLK Cycle-to-Cycle Jitter (Figure 2) Minimum Input Swing Output Rise/Fall Time (20%-80%) 150 105 100 200 Min 440 275 Typ 540 330 25 100 50 140 0.2 800 155 <1 1200 205 150 145 400 35 125 100 200 Max Min 420 275 25C Typ 520 375 30 150 50 140 0.2 800 200 <1 1200 270 150 150 450 45 175 100 200 Max Min 380 280 85C Typ 480 380 40 175 50 140 0.2 800 225 <1 1200 300 480 50 200 Max Unit GHz ps ps
ts th tJITTER VPP tr/tf
ps ps mV ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 11. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. 12. Skew is measured between outputs under identical transitions.
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MC100EP14
900 850 800 VOUTpp (mV) 750 700 650 600 550 5.0 V 3.3 V 9 8 7 6 5 4 3 (JITTER) 2 1 2.5 JITTER OUT ps (RMS)
450
400 0.0
Driver Device Q Zo = 50 W 50 W 50 W D
Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
ORDERING INFORMATION
Device MC100EP14DT MC100EP14DTG MC100EP14DTR2 MC100EP14DTR2G Package TSSOP-20* TSSOP-20* TSSOP-20* TSSOP-20* Shipping 75 Units / Rail 75 Units / Rail 2500 / Tape & Rail 2500 / Tape & Rail
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free.
EEE EEEEEEEEEEEEEE E EEEEEEEEEEEEEE E
0.5 1.0 1.5 FREQUENCY (MHz)
500
2.0
Figure 2. Fmax/Jitter
Q
Zo = 50 W
D Receiver Device
VTT VTT = VCC - 2.0 V
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EE EE
MC100EP14
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC100EP14
PACKAGE DIMENSIONS
TSSOP-20 CASE 948E-02 ISSUE C
20X
K REF
M
2X
L/2
20
11
J J1 B -U- N
L
PIN 1 IDENT 1 10
0.15 (0.006) T U
S
A -V-
N F DETAIL E -W-
DIM A B C D F G H J J1 K K1 L M
C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E
SOLDERING FOOTPRINT*
7.06 1
0.36
16X
16X
1.26
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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IIII IIII IIII
SECTION N-N 0.25 (0.010) M
0.15 (0.006) T U
S
0.10 (0.004)
TU
S
V
S
K K1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
0.65 PITCH
DIMENSIONS: MILLIMETERS
MC100EP14
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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MC10EP14/D

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